# differential clock input from DAC
set_property IOSTANDARD LVDS [get_ports clk_pin_p]
set_property PACKAGE_PIN AF39 [get_ports clk_pin_p]
set_property PACKAGE_PIN AF40 [get_ports clk_pin_n]

# sync signal
set_property IOSTANDARD LVDS [get_ports sync_p]
set_property PACKAGE_PIN T32 [get_ports sync_p]
set_property PACKAGE_PIN R32 [get_ports sync_n]

# s switch
set_property IOSTANDARD LVCMOS18 [get_ports s_in]
set_property PACKAGE_PIN R30 [get_ports s_in]

# digital outputs locations channel A
set_property IOSTANDARD LVDS [get_ports {a_p[0]}]
set_property PACKAGE_PIN U34 [get_ports {a_p[0]}]
set_property PACKAGE_PIN T35 [get_ports {a_n[0]}]
set_property IOSTANDARD LVDS [get_ports {a_p[1]}]
set_property PACKAGE_PIN P35 [get_ports {a_p[1]}]
set_property PACKAGE_PIN P36 [get_ports {a_n[1]}]
set_property IOSTANDARD LVDS [get_ports {a_p[2]}]
set_property PACKAGE_PIN U32 [get_ports {a_p[2]}]
set_property PACKAGE_PIN U33 [get_ports {a_n[2]}]
set_property IOSTANDARD LVDS [get_ports {a_p[3]}]
set_property PACKAGE_PIN AC38 [get_ports {a_p[3]}]
set_property PACKAGE_PIN AC39 [get_ports {a_n[3]}]
set_property IOSTANDARD LVDS [get_ports {a_p[4]}]
set_property PACKAGE_PIN Y42 [get_ports {a_p[4]}]
set_property PACKAGE_PIN AA42 [get_ports {a_n[4]}]
set_property IOSTANDARD LVDS [get_ports {a_p[5]}]
set_property PACKAGE_PIN AC40 [get_ports {a_p[5]}]
set_property PACKAGE_PIN AC41 [get_ports {a_n[5]}]
set_property IOSTANDARD LVDS [get_ports {a_p[6]}]
set_property PACKAGE_PIN AL41 [get_ports {a_p[6]}]
set_property PACKAGE_PIN AL42 [get_ports {a_n[6]}]
set_property IOSTANDARD LVDS [get_ports {a_p[7]}]
set_property PACKAGE_PIN AK39 [get_ports {a_p[7]}]
set_property PACKAGE_PIN AL39 [get_ports {a_n[7]}]
set_property IOSTANDARD LVDS [get_ports {a_p[8]}]
set_property PACKAGE_PIN T36 [get_ports {a_p[8]}]
set_property PACKAGE_PIN R37 [get_ports {a_n[8]}]
set_property IOSTANDARD LVDS [get_ports {a_p[9]}]
set_property PACKAGE_PIN V39 [get_ports {a_p[9]}]
set_property PACKAGE_PIN V40 [get_ports {a_n[9]}]
set_property IOSTANDARD LVDS [get_ports {a_p[10]}]
set_property PACKAGE_PIN W36 [get_ports {a_p[10]}]
set_property PACKAGE_PIN W37 [get_ports {a_n[10]}]
set_property IOSTANDARD LVDS [get_ports {a_p[11]}]
set_property PACKAGE_PIN R33 [get_ports {a_p[11]}]
set_property PACKAGE_PIN R34 [get_ports {a_n[11]}]
set_property IOSTANDARD LVDS [get_ports {a_p[12]}]
set_property PACKAGE_PIN W32 [get_ports {a_p[12]}]
set_property PACKAGE_PIN W33 [get_ports {a_n[12]}]
set_property IOSTANDARD LVDS [get_ports {a_p[13]}]
set_property PACKAGE_PIN V33 [get_ports {a_p[13]}]
set_property PACKAGE_PIN V34 [get_ports {a_n[13]}]
set_property IOSTANDARD LVDS [get_ports {a_p[14]}]
set_property PACKAGE_PIN AJ40 [get_ports {a_p[14]}]
set_property PACKAGE_PIN AJ41 [get_ports {a_n[14]}]
set_property IOSTANDARD LVDS [get_ports {a_p[15]}]
set_property PACKAGE_PIN Y39 [get_ports {a_p[15]}]
set_property PACKAGE_PIN AA39 [get_ports {a_n[15]}]

#digital output locations channel 
# ** B outputs 0 and 1 aren't mapped through dac, they are sent to pins e6, e7, e9 and e10
set_property IOSTANDARD LVDS [get_ports {b_p[0]}]
set_property PACKAGE_PIN Y32 [get_ports {b_p[0]}]
set_property PACKAGE_PIN Y33 [get_ports {b_n[0]}]
set_property IOSTANDARD LVDS [get_ports {b_p[1]}]
set_property PACKAGE_PIN AE29 [get_ports {b_p[1]}]
set_property PACKAGE_PIN AE30 [get_ports {b_n[1]}]
set_property IOSTANDARD LVDS [get_ports {b_p[2]}]
set_property PACKAGE_PIN AD38 [get_ports {b_p[2]}]
set_property PACKAGE_PIN AE38 [get_ports {b_n[2]}]
set_property IOSTANDARD LVDS [get_ports {b_p[3]}]
set_property PACKAGE_PIN AB41 [get_ports {b_p[3]}]
set_property PACKAGE_PIN AB42 [get_ports {b_n[3]}]
set_property IOSTANDARD LVDS [get_ports {b_p[4]}]
set_property PACKAGE_PIN AB38 [get_ports {b_p[4]}]
set_property PACKAGE_PIN AB39 [get_ports {b_n[4]}]
set_property IOSTANDARD LVDS [get_ports {b_p[5]}]
set_property PACKAGE_PIN P32 [get_ports {b_p[5]}]
set_property PACKAGE_PIN P33 [get_ports {b_n[5]}]
set_property IOSTANDARD LVDS [get_ports {b_p[6]}]
set_property PACKAGE_PIN AF41 [get_ports {b_p[6]}]
set_property PACKAGE_PIN AG41 [get_ports {b_n[6]}]
set_property IOSTANDARD LVDS [get_ports {b_p[7]}]
set_property PACKAGE_PIN AF42 [get_ports {b_p[7]}]
set_property PACKAGE_PIN AG42 [get_ports {b_n[7]}]
set_property IOSTANDARD LVDS [get_ports {b_p[8]}]
set_property PACKAGE_PIN AJ38 [get_ports {b_p[8]}]
set_property PACKAGE_PIN AK38 [get_ports {b_n[8]}]
set_property IOSTANDARD LVDS [get_ports {b_p[9]}]
set_property PACKAGE_PIN W40 [get_ports {b_p[9]}]
set_property PACKAGE_PIN Y40 [get_ports {b_n[9]}]
set_property IOSTANDARD LVDS [get_ports {b_p[10]}]
set_property PACKAGE_PIN U37 [get_ports {b_p[10]}]
set_property PACKAGE_PIN U38 [get_ports {b_n[10]}]
set_property IOSTANDARD LVDS [get_ports {b_p[11]}]
set_property PACKAGE_PIN R38 [get_ports {b_p[11]}]
set_property PACKAGE_PIN R39 [get_ports {b_n[11]}]
set_property IOSTANDARD LVDS [get_ports {b_p[12]}]
set_property PACKAGE_PIN N33 [get_ports {b_p[12]}]
set_property PACKAGE_PIN N34 [get_ports {b_n[12]}]
set_property IOSTANDARD LVDS [get_ports {b_p[13]}]
set_property PACKAGE_PIN AD40 [get_ports {b_p[13]}]
set_property PACKAGE_PIN AD41 [get_ports {b_n[13]}]
set_property IOSTANDARD LVDS [get_ports {b_p[14]}]
set_property PACKAGE_PIN AJ42 [get_ports {b_p[14]}]
set_property PACKAGE_PIN AK42 [get_ports {b_n[14]}]
set_property IOSTANDARD LVDS [get_ports {b_p[15]}]
set_property PACKAGE_PIN AD42 [get_ports {b_p[15]}]
set_property PACKAGE_PIN AE42 [get_ports {b_n[15]}]


#data_clk
set_property IOSTANDARD LVDS [get_ports data_clk_p]
set_property IOSTANDARD LVDS [get_ports data_clk_n]
set_property PACKAGE_PIN U36 [get_ports data_clk_p]
set_property PACKAGE_PIN T37 [get_ports data_clk_n]

#led pins
set_property PACKAGE_PIN AM39 [get_ports {led_pins[0]}]
set_property PACKAGE_PIN AN39 [get_ports {led_pins[1]}]
set_property PACKAGE_PIN AR37 [get_ports {led_pins[2]}]
set_property PACKAGE_PIN AT37 [get_ports {led_pins[3]}]
set_property PACKAGE_PIN AR35 [get_ports {led_pins[4]}]
set_property PACKAGE_PIN AP41 [get_ports {led_pins[5]}]
set_property PACKAGE_PIN AP42 [get_ports {led_pins[6]}]
set_property PACKAGE_PIN AU39 [get_ports {led_pins[7]}]
set_property IOSTANDARD LVCMOS18 [get_ports {led_pins[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {led_pins[1]}]
set_property IOSTANDARD LVCMOS18 [get_ports {led_pins[2]}]
set_property IOSTANDARD LVCMOS18 [get_ports {led_pins[3]}]
set_property IOSTANDARD LVCMOS18 [get_ports {led_pins[4]}]
set_property IOSTANDARD LVCMOS18 [get_ports {led_pins[5]}]
set_property IOSTANDARD LVCMOS18 [get_ports {led_pins[6]}]
set_property IOSTANDARD LVCMOS18 [get_ports {led_pins[7]}]


# Reset Input
set_property IOSTANDARD LVCMOS18 [get_ports rst_pin]
set_property PACKAGE_PIN AV40 [get_ports rst_pin]
#reset pin in SW_8 (CPU reset)

# GPIO Input
set_property PACKAGE_PIN AV30 [get_ports GPIO_DIP_SW0]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW0]
set_property PACKAGE_PIN AY33 [get_ports GPIO_DIP_SW1]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW1]
set_property PACKAGE_PIN BA31 [get_ports GPIO_DIP_SW2]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW2]
set_property PACKAGE_PIN BA32 [get_ports GPIO_DIP_SW3]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW3]
set_property PACKAGE_PIN AW30 [get_ports GPIO_DIP_SW4]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW4]
set_property PACKAGE_PIN AY30 [get_ports GPIO_DIP_SW5]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW5]
set_property PACKAGE_PIN BA30 [get_ports GPIO_DIP_SW6]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW6]
set_property PACKAGE_PIN BB31 [get_ports GPIO_DIP_SW7]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW7]

# Sync Signal 
set_property PACKAGE_PIN AV39 [get_ports GPIO_SW_C] 
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_SW_C]
# sync pin in GPIO_SW_C

# Cmd Signal
set_property PACKAGE_PIN AU38 [get_ports cmd] 
set_property IOSTANDARD LVCMOS18 [get_ports cmd]
# cmd pin in GPIO_SW_E

# LCD Display
set_property PACKAGE_PIN AN41 [get_ports LCD_RS_LS]
set_property IOSTANDARD LVCMOS18 [get_ports LCD_RS_LS]
set_property PACKAGE_PIN AT40 [get_ports LCD_E_LS]
set_property IOSTANDARD LVCMOS18 [get_ports LCD_E_LS]
set_property PACKAGE_PIN AR42 [get_ports LCD_RW_LS]
set_property IOSTANDARD LVCMOS18 [get_ports LCD_RW_LS]
set_property PACKAGE_PIN AT42 [get_ports LCD_DB4_LS]
set_property IOSTANDARD LVCMOS18 [get_ports LCD_DB4_LS]
set_property PACKAGE_PIN AR38 [get_ports LCD_DB5_LS]
set_property IOSTANDARD LVCMOS18 [get_ports LCD_DB5_LS]
set_property PACKAGE_PIN AR39 [get_ports LCD_DB6_LS]
set_property IOSTANDARD LVCMOS18 [get_ports LCD_DB6_LS]
set_property PACKAGE_PIN AN40 [get_ports LCD_DB7_LS]
set_property IOSTANDARD LVCMOS18 [get_ports LCD_DB7_LS]

set_property CONFIG_VOLTAGE 1.8 [current_design]
set_property CFGBVS GND [current_design]